1. Field of the Invention
The present invention relates to a solid-state imaging device and an imaging device.
Priority is claimed on Japanese Patent Application No. 2011-251529, filed Nov. 17, 2011, the content of which is incorporated herein by reference.
2. Description of Related Art
In recent years, imaging devices such as video cameras and electronic still cameras have generally come into wide use. Charge coupled device (CCD)-type or amplification-type solid-state imaging devices have been used in such imaging devices (hereinafter referred to as “cameras”). In the amplification-type solid-state imaging devices, a plurality of pixels are arrayed in a two-dimensional matrix form. In the amplification-type solid-state imaging devices, signal charges generated and stored by photoelectric conversion elements serving as light-receiving units of pixels are guided toward amplification units installed in the pixels, and the signals amplified by the amplification units are output as output signals from the pixels.
Examples of the amplification-type solid-state imaging device include a solid-state imaging device in which a junction field effect transistor is used in an amplification unit and a complementary metal oxide semiconductor (CMOS)-type solid-state imaging device in which a CMOS transistor is used in an amplification unit.
In the past, a general CMOS type solid-state imaging device (hereinafter, also referred to as a “solid-state imaging device”) has utilized a method of sequentially reading signal charges generated and stored by photoelectric conversion elements of pixels arrayed in a two-dimensional matrix form for each row. According to this reading method, an exposure timing in the photoelectric conversion element of each pixel is determined by start and end of the reading of the signal charge. Therefore, the exposure timing is different for each pixel. Therefore, when a fast-moving subject is imaged using such a CMOS type solid-state imaging device, the subject in the captured image may be distorted.
As an exposure method of eliminating the distortion of the subject, a simultaneous imaging function (hereinafter referred to as a “global shutter function”) of generating and storing signal charges to realize simultaneity of the generation and storage of the signal charges by exposing all of the pixels at the same timing has been suggested. CMOS type solid-state imaging devices having the global shutter function tend to be used for many purposes.
In the CMOS type solid-state imaging devices having the global shutter function, it is generally necessary to store the signal charges generated by the photoelectric conversion elements until reading ends. Therefore, a storage capacitor having a light-shielding property is necessary. In the CMOS type solid-state imaging devices having the global shutter function according to the related art, after simultaneous exposure of all of the pixels, the signal charges generated by the photoelectric conversion elements are simultaneously transmitted to the storage capacitors in all of the pixels and are stored once, and then the signal charges stored in the storage capacitors are sequentially converted into pixel signals at a predetermined reading timing.
In the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2010-219339, pixels having the global shutter function according to the related art are distributed between two substrates. Therefore, it is possible to prevent the chip area of a first substrate from increasing. Further, as the first and second substrates are configured to be bonded to each other, it is possible to prevent a signal quality from deteriorating due to noise caused by light during a waiting period until the signal charges stored in the storage capacitors are read.
FIGS. 10A and 10B are diagrams illustrating the overview of a connection configuration of substrates of a solid-state imaging device of the related art to which the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2010-219339 is applied. FIG. 10A is a side view illustrating the connection configuration of the first and second substrates of a solid-state imaging device 100. FIG. 10B is a top view illustrating the connection configuration of the first and second substrates of the solid-state imaging device 100.
In the solid-state imaging device 100, as shown in FIG. 10A, a pixel unit 11 formed in the first substrate and a pixel unit 12 formed in the second substrate are connected to each other via inter-substrate connectors 13. More specifically, photoelectric conversion elements are formed in the pixel unit 11 and the storage capacitors are formed in the pixel unit 12. In the inter-substrate connector 13, for example, the photoelectric conversion element in the pixel unit 11 and the storage capacitor in the pixel unit 12 are connected to each other via a bump. Thus, in the solid-state imaging device 100, the pixel units 11 and 12 connected to each other via the bumps are configured to form a lamination structure in the region of a pixel array unit 40 of the solid-state imaging device 100.
However, in order to read the pixel signals from the pixels arrayed in the solid-state imaging device, it is necessary to transmit a plurality of control signals to each of the pixels. Therefore, in the solid-state imaging device 100 shown in FIGS. 10A and 10B, it is necessary for a vertical reading circuit 200 to transmit the plurality of control signals to each of the pixels of the pixel unit 11 formed in the first substrate and the pixel unit 12 formed in the second substrate.